1. Field of the Invention
This invention relates to a semiconductor integrated circuit device which can be formed with small size and small thickness and formed with high mounting density and which has a package structure which is high in the thermal conductivity and moisture resistance and is highly reliable.
2. Description of the Related Art
A semiconductor integrated circuit device such as an IC and LSI is packaged to protect the semiconductor substrate (chip) on which an integrated circuit is formed from a mechanical damage and a contamination source such as dusts, chemical, gases, and moisture. A package used for packaging the semiconductor integrated circuit device is required to have characteristics such as high hermetic sealing, high heat resistance to high temperatures applied in the assembling process, high mechanical strength, chemically stable characteristic, and good electrical properties such as high insulating property and high frequency characteristic, and resin or ceramics may be used as the material thereof. When resin is used, a DIP (Dual In-line Package) type semiconductor integrated circuit device shown in FIG. 1 may be provided, for example. The semiconductor integrated circuit device is obtained by fixedly attaching a chip 100 having a semiconductor integrated circuit formed thereon to a chip mounting portion 25 of a lead frame, for example, by use of an electrical conductive adhesive agent 35. The chip 100 includes leads 45 for connection with an external circuit, and in general, the lead 45 is formed of a lead frame. A bonding portion 55 is formed on one end of the lead 45 and a connection electrode 65 such as an Al pad formed on the chip 100 is electrically connected to the bonding portion via a bonding wire 75 formed of Al or Au, for example. The chip 100, chip mounting portion 25, bonding wire 75 and part of the lead 45 are covered with mold resin 85 by use of the transfer molding method. As an example of the document disclosing the above technique, there is provided an article "LARGE-CAPACITY MEMORY BOARD BY CHIP LAMINATION MOUNTING" of "THIRD MICROELECTRONICS SYMPOSIUM (MES '89)" July 1989 (TOKIO) in which the technique of protecting the chip surface by use of epoxy-series protection resin is disclosed.
In recent years, the chip size tends to increase with an increase in the integration density of the semiconductor integrated circuit device, and at the same time, the semiconductor integrated circuit device tends to be made smaller and thinner like electronic parts other than the semiconductor integrated circuit device not only in the above-described resin molded type device but also in other type devices, and therefore, the package size must be kept unchanged or reduced to a minimum possible size.
The semiconductor integrated circuit device tends to be made smaller and thinner and it becomes difficult for the conventional package to sufficiently follow the tendency. For example, a memory card has a thickness of 3 mm or more at present, but it must be made further thin and the higher mounting density must be attained. However, as shown in FIG. 1, even if the thickness of the chip 100 itself can be made as small as approx. 0.35 mm, a distance H from the connection portion between the front end of the lead 45 and a circuit board (not shown) on which the semiconductor integrated circuit device is mounted to the top portion of the mold resin 85 covering the chip 100, that is, the height of the semiconductor integrated circuit device will be set to approx. 1.25 mm at a minimum (at this time, the thickness T of the mold resin 85 is approx. 1.0 mm). Further, since the lead 45 is supported by the mold resin 85, it must be covered with the mold resin 85 together with the chip 100 over a certain length. If the sum of the length over which the lead 45 is buried in the mold resin 85 and a distance between the end of the lead 45 and the end of the chip 100 is set to D, the length of one side of the semiconductor integrated circuit device is larger than the length of one side of the chip 100 itself by 2D. When D is set to approx. 1 mm, it becomes longer by approx. 2 mm. Thus, the requirement for reducing the size cannot be satisfied in view of the length.
Further, with the above conventional mold resin type semiconductor integrated circuit device, external water can easily enter the package via a path of the lead 45, bonding wire 75 and connection electrode 65 and from the mold resin having water permeability, thus degrading the long-term reliability. Further, a crack may occur in the mold resin 85 by a temperature rise caused by reflow when the semiconductor integrated circuit device is mounted on a circuit board or the like, thereby causing a serious problem which influences the reliability. In addition, since thermal expansion coefficients of the silicon substrate and the mold resin are different from each other, a crack may occur in the chip at the time of mounting, thereby causing a serious problem. Further, since the thermal conductivity of the mold resin is low, it is difficult to use the mold resin in a semiconductor device whose power consumption is large.